Designed to program devices in high volumes, the model 4800 is a fine-pitch automated device programmer that combines 8th Generation universal device support, the unrivaled speed of Vector Engine Co-Processor? technology, and on-the-fly vision centering. The model 4800 can utilize up to nine sites, programming up to 36 devices in parallel with individual socket cards, to achieve high production throughput of up to 1,500 devices per hour.

Universal Device Support

The model 4800 is designed to program microcontrollers, high-density flash memory, E/EPROM and other device technologies with densities up to an 8 Eb theoretical limit. It also supports very low voltage devices down to 0.7 (Vdd).

Speed

BPM Microsystems  Vector Engine Co-Processor hardware-accelerates waveforms during the programming cycle. Faster speeds are achieved through synchronous operations that eliminate the dead times so the device under test no longer waits for the programmer. The result is programming near the theoretical limits of the silicon design   the faster the device, the faster the device is programmed.

The model 4800 using Vector Engine Co-Processor technology can perform an Erase, Program and Verify of a 1Gb 16-bit NAND Micron MT29F1G16ABBDAHC-IT:D in 23.13 seconds.

Robust Handler

The robust design of BPM Microsystems? 4000 series device handling systems has undergone more than a decade of enhancements, providing the most advanced version to date with the model 4800. Integrated into the model 4800 is the LaserAlign? sensor from CyberOptics?, which automatically aligns devices 搊n-the-fly? resulting in unsurpassed placement accuracy and high first pass yields at full mechanical throughput. The system also offers flexible options for input and output media with choices of tray, tape or tube that can be used simultaneously.

Socket Cards

As the electro-mechanical interface between the programmable semiconductor device and the programmer, BPM Microsystems? socket cards with a receptacle socket option offer the most cost-effective and efficient programming solution in the industry. Individual socket cards can be fully utilized and replaced without dramatically affecting programming capacity. The fault-tolerant socket card design increases your manufacturing up-time and saves replacement costs by as much as 75 percent.

4800 Device Programmer Features

• Universal support for the latest programmable device architectures (OneNAND?, eMMC?, iNAND?, moviNAND?, MLC, SLC, and more)
• Includes 16 GB of onboard memory per site and 64-bit architecture, breaking past the 4 GB data density barrier
• Modular sites share common hardware and software, resulting in process consistency between 8th Gen automated and manual programmer models
• Handles a wide range of packages including very small packages such as MSOP8, TSOC6, and SOT23 as small as 1.63 mm by 2.95 mm
• Quick setup and changeover with automatic self-teaching
• Optional peripherals: Tape I/O, Tray Stacker, Tube I/O, Laser Marker
• Non-stop operation with dual tray stackers
• Laser marker with serialization and date code optional

Socket Card Features

• Compatible with Flashstream socket cards
• Automated and manual 8th Gen models share the same socket cards
• Purchase one socket card for first article approval
• Replace only worn or damaged socket with receptacle-base socket option
• Active, Pass and Fail indicators per device
• Support for thousands of devices and a wide variety of packages

Software Features

• Custom and manufacturer-approved NAND Flash bad block handling methods available; bad block replacement scheme included
• BERT? ? Bit Error Rate Tolerance
• Serialization support on all sockets
• JobMaster? ? production automation tool
• File encryption for IP protection
• Supports multiple label printing with third party label printers
• Automated job event notifications via email
• View important system events graphically with Log Visualization
• Application Programming Interface option (API)
• Advanced Serialization with External Serialization Server (ESS)
• Guaranteed release dates for new algorithm additions